ARINC 664 (AFDX)¶
Overview¶
ARINC 664 Part 7 Avionics Full-Duplex Switched Ethernet (AFDX) defines a deterministic Ethernet-based network for avionics. It guarantees bounded latency through Virtual Links (VL) with pre-configured bandwidth allocation.
Key Facts
- Physical: Standard IEEE 802.3 Ethernet (100 Mbps / 1 Gbps)
- Topology: Switched, full-duplex
- Determinism: Bandwidth Allocation Gap (BAG) per Virtual Link
- Redundancy: Dual networks (A/B) with sequence numbering
- Aircraft: A380, A350, B787, F-35
Virtual Link Concept¶
A Virtual Link (VL) is a unidirectional logical connection from one source to one or more destinations, with guaranteed bandwidth.
┌─────────────────────────────────────────────────────────────────┐
│ AFDX Network │
│ │
│ Source ═══► VL 1024 ═══► Switch ═══► Destination A │
│ (LRU) (BAG=4ms) ║ Destination B │
│ (Lmax=512) ╚════════► Destination C │
│ │
│ One transmitter per VL (enforced by network configuration) │
│ Multiple receivers (multicast addressing) │
└─────────────────────────────────────────────────────────────────┘
Frame Structure¶
┌──────────────────────────────────────────────────────────────────┐
│ Dst MAC │ Src MAC │ EType │ IP Header │ UDP Header │ Payload │Seq│
│ (6B) │ (6B) │ (2B) │ (20B) │ (8B) │ (0-1471)│(1)│
└──────────────────────────────────────────────────────────────────┘
Destination MAC Format¶
Byte: 0 1 2 3 4 5
┌─────┬─────┬─────┬────────┬────────┬────────┐
│0x03 │0x00 │0x00 │Net ID │VL High │VL Low │
└─────┴─────┴─────┴────────┴────────┴────────┘
Constant prefix Network Virtual Link ID
Sequence Number¶
- 1 byte appended after the UDP payload
- Wraps 0→255
- Used for redundancy management (duplicate elimination)
BAG (Bandwidth Allocation Gap)¶
The minimum interval between consecutive frames on a VL:
| BAG Value | Min Interval | Max Bandwidth (Lmax=1518B) |
|---|---|---|
| 1 ms | 1 ms | 12.1 Mbps |
| 2 ms | 2 ms | 6.1 Mbps |
| 4 ms | 4 ms | 3.0 Mbps |
| 8 ms | 8 ms | 1.5 Mbps |
| 16 ms | 16 ms | 759 kbps |
| 32 ms | 32 ms | 380 kbps |
| 64 ms | 64 ms | 190 kbps |
| 128 ms | 128 ms | 95 kbps |
Redundancy Management¶
AFDX uses dual independent networks. The receiver implements "First Valid Wins":
sequenceDiagram
participant Source
participant NetA as Network A
participant NetB as Network B
participant Sink
Source->>NetA: Frame (seq=42)
Source->>NetB: Frame (seq=42)
NetA->>Sink: Frame arrives first
Note over Sink: Accept (seq=42, new)
NetB->>Sink: Frame arrives second
Note over Sink: Reject (seq=42, duplicate) API Reference¶
#include "arinc664.h"
// Initialize Virtual Link
void afdx_vl_init(afdx_vl_state_t *vl, const afdx_vl_config_t *config,
const uint8_t *src_mac);
// Build AFDX frame (auto-increments sequence number)
int afdx_build_frame(afdx_vl_state_t *vl, const void *payload,
size_t payload_len, uint8_t *frame_buf);
// Parse received frame
bool afdx_parse_frame(const uint8_t *frame, size_t frame_len,
uint16_t *vl_id, uint8_t *seq_num,
const uint8_t **payload, size_t *payload_len);
// BAG enforcement check
bool afdx_bag_check(afdx_vl_state_t *vl);
// Redundancy management
void afdx_redundancy_init(afdx_redundancy_t *rm);
bool afdx_redundancy_check(afdx_redundancy_t *rm, uint8_t seq, uint8_t network);
Build & Run¶
References¶
- ARINC Specification 664, Part 7 (2009)
- ARINC Report 664P7-1